enhance GIC v3 ITS and enable it on i.MX 95 EVK A55 platform #92346
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JiafeiPan
commented
Jun 28, 2025
JiafeiPan
commented
- Enabled DMA noncoherent for GIC v3 and GIC v3 ITS
- Fixed some bugs for GIC v3 ITS
- Enabled GIC ITS on i.MX 95 EVK A55 platform
- Added i.MX 95 EVK support for test arm64_gicv3_its
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area: Interrupt Controller
platform: ARM
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GIC redistributor on Some platform are connected to a non-coherent downstream interconnect, it need to use Non-cahable and Non-shareable access atttributes to access external memory. And also flush the data cache after CPU update related memory. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add DMA noncoherent support on GICv3 ITS driver. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
For RDbase used by its command, When GITS_TYPER.PTA = 1, physicall address is used, the RDbase field consist of bits[51:16] of the address, so need to left shift the address by 16 bits. But when GITS_TYPER.PTA = 0, PE number is used, no need to shit anymore. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC v3 ITS is initialized in pre-kernel stage in which sleep function can't work yet, so use busy delay in pre-kernel stage and use sleep delay in post-kernel stage. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Enlarge the memory size to 10M bytes as it is not enough if run some networking application. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Added dts node for GIC v3 ITS. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
In case of ITS is enabled, need to include LPI in the total number of irq. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC redistribute on i.MX 95 is DMA noncoherent, so enable CONFIG_GIC_V3_RDIST_DMA_NONCOHERENT. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
GIC ITS depends on kernel heap, so move GIC initialize to be behind of heap which initialization priority is CONFIG_KERNEL_INIT_PRIORITY_OBJECTS (it is 30 by default). MU mailbox and SCMI objects depend on GIC, so set their init priority to be same with GIC, the initialization sequence decided by the dts dependency although they use the same init priority. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add imx95_evk support, as hardware limication, it only has 832 LPIs. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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